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Introduction to Mixtile Core 3568

Introduction

Mixtile System-on-Module, Core 3568, is designed for supporting multiple applications based on ARM high-performance and low-power processors.

The module is mainly composed of SoC RK3568 and LPDDR4, EMMC, plus PMIC. As the control unit of the entire system, it provides a basic hardware environment to run the entire system.

Optimized Board-to-Board Connecting Solution for System-on-Module

Technical specifications

Basic specifications

  • CPU: Quad-core ARM Cortex-A55, Neon and FPU
  • GPU: G52 2EE
  • NPU: RK NN, 0.8Tops
  • DDR: 2/4GB 32-bit LPDDR4
  • Storage: 16/32GB eMMC 5.1

Hardware

  • Supply: 3.3 VDC / 5.0 VDC
  • Temperature range: 0 to +80℃ operating
  • Dimensions: 50mm x 50mm x 5mm
  • Total interfaces on BGA: 536 pins
  • Video Decoder: 4KP60 H.264/H.265/VP9
  • Video Encoder: 1080P60 H.264/H.265
  • ISP: 8M ISP, HDR
  • MIPI_CSI: MIPI-CSI2, 1×4-lane/2×2-lane@2.5Gbps/lane
  • DVP/CIF: IO: 150MHz, Support BT.656/601/1120
  • Display: RGB, LVDS/MIPI DSI, HDMI, eDP, Eink
  • SDIO: SDIO 3.0 x3
  • Peripheral:
    • USB 2.0 HOST, USB2.0 OTG
    • USB3.0 OTG, USB3.0 HOT, SATA 3.0 x3, PCIE 2.1(1x1Lane), QSGMII x1, Combo with 3 Serdes Lanes
    • PCIE3.0 1 ×2Lanes/2 ×1Lane@8Gbps
  • Ethernet: 2x GMAC (10/100/1000M)
  • Audio: 1x 8ch I2S/TDM, 2x2ch I2S 8ch PDM, 1x SPDIF OUT
  • Others: 10x UART, 4x SPI, 16x PWM,6x I2C,3x CAN FD,8x SAR-ADC
  • OTP: OTP (Size 8K)
  • Crypto: SM3/4, TEE, Trustzone

System

  • System: Support Android 11.0, Ubuntu 18.04 System, Ubuntu 20.04 System
  • Advanced functions: Provide Linux container on Android, deploy Linux applications seamlessly on Android 

Block diagram

Product dimensions

Core 3568 size: 50 mm x 50 mm x 5 mm

Top view of Core 3568

Bottom view of Core 3568

Top view of carrier board for Core 3568

Carrier board size: 50 mm x 50 mm x 1.6 mm

Bottom view of carrier board

Pins definition

Top view of pin arrangement

 Pin info

PIN numberPIN namePIN typeVoltage levelCPU ball name/
multiplex function
CPU ball numberDescription
1GNDPOWER0N/AN/Areferenced ground of power and signal
2USB3_HOST1_SSRXPLVDS inputlvdsUSB3_HOST1_SSRXP/SATA1_RXP/QSGMII_RXP_M0U28USB3.0 HOST1 SuperSpeed receive differential Positive
3USB3_HOST1_SSRXNLVDS inputlvdsUSB3_HOST1_SSRXN/SATA1_RXN/QSGMII_RXN_M0U27USB3.0 HOST1 SuperSpeed receive differential Negative
4GNDPOWER0N/AN/Areferenced ground of power and signal
5USB3_HOST1_SSTXNLVDS outputlvdsUSB3_HOST1_SSTXN/SATA1_TXN/QSGMII_TXN_M0V27USB3.0 HOST1 SuperSpeed transmit differential Negative
6USB3_HOST1_SSTXPLVDS outputlvdsUSB3_HOST1_SSTXP/SATA1_TXP/QSGMII_TXP_M0V28USB3.0 HOST1 SuperSpeed transmit differential Positive
7GNDPOWER0N/AN/Areferenced ground of power and signal
8SATA0_RXNLVDS inputlvdsUSB3_OTG0_SSRXN/SATA0_RXNR27SATA receive signal DM
9SATA0_RXPLVDS inputlvdsUSB3_OTG0_SSRXP/SATA0_RXPR28SATA receive signal DP
10GNDPOWER0N/AN/Areferenced ground of power and signal
11SATA0_TXNLVDS outputlvdsUSB3_OTG0_SSTXN/SATA0_TXNT27SATA transmission signal DM
12SATA0_TXPLVDS outputlvdsUSB3_OTG0_SSTXP/SATA0_TXPT28SATA transmission signal DP
13GNDPOWER0N/AN/Areferenced ground of power and signal
14USB3_OTG0_DMLVDS output/InputlvdsUSB3_OTG0_DMP28USB3 OTG0 HS/FS/LS Data Minus
15USB3_OTG0_DPLVDS output/InputlvdsUSB3_OTG0_DPP27USB3 OTG0 HS/FS/LS Data Plus
16GNDPOWER0N/AN/Areferenced ground of power and signal
17USB3_HOST1_DMLVDS output/InputlvdsUSB3_HOST1_DMP25USB3 HOST1 HS/FS/LS Data Minus
18USB3_HOST1_DPLVDS output/InputlvdsUSB3_HOST1_DPP24USB3 HOST1 HS/FS/LS Data Plus
19GNDPOWER0N/AN/Areferenced ground of power and signal
20EDP_TX_D3NLVDS outputlvdsEDP_TX_D3NN27EDP transmit differential data lane 3 Negative
21EDP_TX_D3PLVDS outputlvdsEDP_TX_D3PM28EDP transmit differential data lane 3 Positive
22GNDPOWER0N/AN/Areferenced ground of power and signal
23EDP_TX_D2NLVDS outputlvdsEDP_TX_D2NM27EDP transmit differential data lane 2 Negative
24EDP_TX_D2PLVDS outputlvdsEDP_TX_D2PL28EDP transmit differential data lane 2 Positive
25GNDPOWER0N/AN/Areferenced ground of power and signal
26EDP_TX_D1NLVDS outputlvdsEDP_TX_D1NL27EDP transmit differential data lane 1 Negative
27EDP_TX_D1PLVDS outputlvdsEDP_TX_D1PK28EDP transmit differential data lane 1 Positive
28GNDPOWER0N/AN/Areferenced ground of power and signal
29EDP_TX_D0NLVDS outputlvdsEDP_TX_D0NK27EDP transmit differential data lane 0 Negative
30EDP_TX_D0PLVDS outputlvdsEDP_TX_D0PJ28EDP transmit differential data lane 0 Positive
31GNDPOWER0N/AN/Areferenced ground of power and signal
32EDP_TX_AUXNLVDS output/inputlvdsEDP_TX_AUXNM25EDP AUX differential Negative
33EDP_TX_AUXPLVDS output/inputlvdsEDP_TX_AUXPL25EDP AUX differential Positive
34GNDPOWER0N/AN/Areferenced ground of power and signal
35NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
36NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
37NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
38NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
39NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
40NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
41NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
42NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
43NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
44NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
45NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
46NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
47NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
48GNDPOWER0N/AN/Areferenced ground of power and signal
49NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
50NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
51NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
52NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
53NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
54NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
55NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
56NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
57NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
58NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
59NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
60NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
61NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
62NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
63NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
64NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
65NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
66NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
67NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
68NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
69NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
70NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
71NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
72NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
73NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
74NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
75NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
76NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
77NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
78NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
79NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
80NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
81NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
82GNDPOWER0N/AN/Areferenced ground of power and signal
83MIPI_CSI_RX_D3NLVDS inputlvdsMIPI_CSI_RX_D3NAE9MIPI CSI receive differential data lane 3 Negative
84MIPI_CSI_RX_D3PLVDS inputlvdsMIPI_CSI_RX_D3PAD9MIPI CSI receive differential data lane 3 Positive
85GNDPOWER0N/AN/Areferenced ground of power and signal
86MIPI_CSI_RX_D2NLVDS inputlvdsMIPI_CSI_RX_D2NAD11MIPI CSI receive differential data lane 2 Negative
87MIPI_CSI_RX_D2PLVDS inputlvdsMIPI_CSI_RX_D2PAE11MIPI CSI receive differential data lane 2 Positive
88GNDPOWER0N/AN/Areferenced ground of power and signal
89MIPI_CSI_RX_D1NLVDS inputlvdsMIPI_CSI_RX_D1NAH11MIPI CSI receive differential data lane 1 Negative
90MIPI_CSI_RX_D1PLVDS inputlvdsMIPI_CSI_RX_D1PAG11MIPI CSI receive differential data lane 1 Positive
91GNDPOWER0N/AN/Areferenced ground of power and signal
92MIPI_CSI_RX_D0NLVDS inputlvdsMIPI_CSI_RX_D0NAH12MIPI CSI receive differential data lane 0 Negative
93MIPI_CSI_RX_D0PLVDS inputlvdsMIPI_CSI_RX_D0PAG12MIPI CSI receive differential data lane 0 Positive
94GNDPOWER0N/AN/Areferenced ground of power and signal
95GNDPOWER0N/AN/Areferenced ground of power and signal
96MIPI_CSI_RX_CLK1NLVDS inputlvdsMIPI_CSI_RX_CLK1NAH9MIPI CSI receive differential Clock 1 Negative
97MIPI_CSI_RX_CLK1PLVDS inputlvdsMIPI_CSI_RX_CLK1PAG9MIPI CSI receive differential Clock 1 Positive
98GNDPOWER0N/AN/Areferenced ground of power and signal
99MIPI_CSI_RX_CLK0NLVDS inputlvdsMIPI_CSI_RX_CLK0NAH10MIPI CSI receive differential Clock 0 Negative
100MIPI_CSI_RX_CLK0PLVDS inputlvdsMIPI_CSI_RX_CLK0PAG10MIPI CSI receive differential Clock 0 Positive
101GNDPOWER0N/AN/Areferenced ground of power and signal
102NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
103NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
104NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
105GNDPOWER0N/AN/Areferenced ground of power and signal
106USB2_HOST2_DMLVDS output/InputlvdsUSB2_HOST2_DMR1USB HOST2 Data Minus
107USB2_HOST2_DPLVDS output/InputlvdsUSB2_HOST2_DPR2USB HOST2 Data Plus
108GNDPOWER0N/AN/Areferenced ground of power and signal
109USB2_HOST3_DMLVDS output/InputlvdsUSB2_HOST3_DMT1USB HOST3 Data Minus
110USB2_HOST3_DPLVDS output/InputlvdsUSB2_HOST3_DPT2USB HOST3 Data Plus
111GNDPOWER0N/AN/Areferenced ground of power and signal
112MIPI_DSI_TX1_D3PLVDS outputlvdsMIPI_DSI_TX1_D3PAD12MIPI_DSI transmit 1 differential data lane 3 Positive
113MIPI_DSI_TX1_D3NLVDS outputlvdsMIPI_DSI_TX1_D3NAE12MIPI_DSI transmit 1 differential data lane 3 Negative
114GNDPOWER0N/AN/Areferenced ground of power and signal
115MIPI_DSI_TX1_D2PLVDS outputlvdsMIPI_DSI_TX1_D2PAD14MIPI_DSI transmit 1 differential data lane 2 Positive
116MIPI_DSI_TX1_D2NLVDS outputlvdsMIPI_DSI_TX1_D2NAC14MIPI_DSI transmit 1 differential data lane 2 Negative
117GNDPOWER0N/AN/Areferenced ground of power and signal
118MIPI_DSI_TX1_CLKPLVDS outputlvdsMIPI_DSI_TX1_CLKPAD15MIPI_DSI transmit 1 differential Clock Positive
119MIPI_DSI_TX1_CLKNLVDS outputlvdsMIPI_DSI_TX1_CLKNAE15MIPI_DSI transmit 1 differential Clock Negative
120GNDPOWER0N/AN/Areferenced ground of power and signal
121MIPI_DSI_TX1_D1PLVDS outputlvdsMIPI_DSI_TX1_D1PAD17MIPI_DSI transmit 1 differential data lane 1 Positive
122MIPI_DSI_TX1_D1NLVDS outputlvdsMIPI_DSI_TX1_D1NAC17MIPI_DSI transmit 1 differential data lane 1 Negative
123GNDPOWER0N/AN/Areferenced ground of power and signal
124MIPI_DSI_TX1_D0PLVDS outputlvdsMIPI_DSI_TX1_D0PAD18MIPI_DSI transmit 1 differential data lane 0 Positive
125MIPI_DSI_TX1_D0NLVDS outputlvdsMIPI_DSI_TX1_D0NAE18MIPI_DSI transmit 1 differential datalane 0 Negative
126GNDPOWER0N/AN/Areferenced ground of power and signal
127MIPI_DSI_TX0_D3P/LVDS_TX0_D3PLVDS outputlvdsMIPI_DSI_TX0_D3P/LVDS_TX0_D3PAH13MIPI_DSI transmit 0 differential data lane 3 Positive
128MIPI_DSI_TX0_D3N/LVDS_TX0_D3NLVDS outputlvdsMIPI_DSI_TX0_D3N/LVDS_TX0_D3NAG13MIPI_DSI transmit 0 differential data lane 3 Negative
129GNDPOWER0N/AN/Areferenced ground of power and signal
130MIPI_DSI_TX0_D2P/LVDS_TX0_D2PLVDS outputlvdsMIPI_DSI_TX0_D2P/LVDS_TX0_D2PAH14MIPI_DSI transmit 0 differential data lane 2 Positive
131MIPI_DSI_TX0_D2N/LVDS_TX0_D2NLVDS outputlvdsMIPI_DSI_TX0_D2N/LVDS_TX0_D2NAG14MIPI_DSI transmit 0 differential data lane 2 Negative
132GNDPOWER0N/AN/Areferenced ground of power and signal
133MIPI_DSI_TX0_CLKP/LVDS_TX0_CLKPLVDS outputlvdsMIPI_DSI_TX0_CLKP/LVDS_TX0_CLKPAH15MIPI_DSI transmit 0 differential Clock Positive
134MIPI_DSI_TX0_CLKN/LVDS_TX0_CLKNLVDS outputlvdsMIPI_DSI_TX0_CLKN/LVDS_TX0_CLKNAG15MIPI_DSI transmit 0 differential Clock Negative
135GNDPOWER0N/AN/Areferenced ground of power and signal
136MIPI_DSI_TX0_D1P/LVDS_TX0_D1PLVDS outputlvdsMIPI_DSI_TX0_D1P/LVDS_TX0_D1PAH16MIPI_DSI transmit 0 differential data lane 1 Positive
137MIPI_DSI_TX0_D1N/LVDS_TX0_D1NLVDS outputlvdsMIPI_DSI_TX0_D1N/LVDS_TX0_D1NAG16MIPI_DSI transmit 0 differential data lane 1 Negative
138GNDPOWER0N/AN/Areferenced ground of power and signal
139MIPI_DSI_TX0_D0P/LVDS_TX0_D0PLVDS outputlvdsMIPI_DSI_TX0_D0P/LVDS_TX0_D0PAH17MIPI_DSI transmit 0 differential data lane 0 Positive
140MIPI_DSI_TX0_D0N/LVDS_TX0_D0NLVDS outputlvdsMIPI_DSI_TX0_D0N/LVDS_TX0_D0NAG17MIPI_DSI transmit 0 differential data lane 0 Negative
141GNDPOWER0N/AN/Areferenced ground of power and signal
142GNDPOWER0N/AN/Areferenced ground of power and signal
143HDMI_TXCLKN_PORTLVDS outputlvdsHDMI_TX_CLKNAG19HDMI2.0 transmit differential Clock Negative
144HDMI_TXCLKP_PORTLVDS outputlvdsHDMI_TX_CLKPAH19HDMI2.0 transmit differential Clock Positive
145GNDPOWER0N/AN/Areferenced ground of power and signal
146HDMI_TX0N_PORTLVDS outputlvdsHDMI_TX_D0NAH20HDMI2.0 transmit differential data lane 0 Negative
147HDMI_TX0P_PORTLVDS outputlvdsHDMI_TX_D0PAG20HDMI2.0 transmit differential data lane 0 Positive
148GNDPOWER0N/AN/Areferenced ground of power and signal
149HDMI_TX1N_PORTLVDS outputlvdsHDMI_TX_D1NAH21HDMI2.0 transmit differential data lane 1 Negative
150HDMI_TX1P_PORTLVDS outputlvdsHDMI_TX_D1PAG21HDMI2.0 transmit differential data lane 1 Positive
151GNDPOWER0N/AN/Areferenced ground of power and signal
152HDMI_TX2N_PORTLVDS outputlvdsHDMI_TX_D2NAH22HDMI2.0 transmit differential data lane 2 Negative
153HDMI_TX2P_PORTLVDS outputlvdsHDMI_TX_D2PAG22HDMI2.0 transmit differential data lane 2 Positive
154GNDPOWER0N/AN/Areferenced ground of power and signal
155PCIE30_REFCLKN_INLVDS inputlvdsPCIE30_REFCLKN_INAA25PCIe3.0 differential clock Negative,Only support input
156PCIE30_REFCLKP_INLVDS inputlvdsPCIE30_REFCLKP_INY25PCIe3.0 differential clock Positive,Only support input
157GNDPOWER0N/AN/Areferenced ground of power and signal
158PCIE30_RX1NLVDS inputlvdsPCIE30_RX1NAD27PCIe3.0 receive differential data lane 1 Negative
159PCIE30_RX1PLVDS inputlvdsPCIE30_RX1PAD28PCIe3.0 receive differential data lane 1 Positive
160GNDPOWER0N/AN/Areferenced ground of power and signal
161PCIE30_RX0NLVDS inputlvdsPCIE30_RX0NAC27PCIe3.0 receive differential data lane 0 Negative
162PCIE30_RX0PLVDS inputlvdsPCIE30_RX0PAC28PCIe3.0 receive differential data lane 0 Positive
163GNDPOWER0N/AN/Areferenced ground of power and signal
164PCIE30_TX1NLVDS outputlvdsPCIE30_TX1NAB27PCIe3.0 transmit differential data lane 1 Negative
165PCIE30_TX1PLVDS outputlvdsPCIE30_TX1PAB28PCIe3.0 transmit differential data lane 1 Positive
166GNDPOWER0N/AN/Areferenced ground of power and signal
167PCIE30_TX0NLVDS outputlvdsPCIE30_TX0NAA27PCIe3.0 transmit differential data lane 0 Negative
168PCIE30_TX0PLVDS outputlvdsPCIE30_TX0PAA28PCIe3.0 transmit differential data lane 0 Positive
169GNDPOWER0N/AN/Areferenced ground of power and signal
170SATA2_RXNLVDS inputlvdsPCIE20_RXN/SATA2_RXN/QSGMII_RXN_M1Y28PCIe2.0 receive differential Negative
171SATA2_RXPLVDS inputlvdsPCIE20_RXP/SATA2_RXP/QSGMII_RXP_M1Y27PCIe2.0 receive differential Positive
172GNDPOWER0N/AN/Areferenced ground of power and signal
173SATA2_TXNLVDS outputlvdsPCIE20_TXN/SATA2_TXN/QSGMII_TXN_M1W28PCIe2.0 transmit differential Negative
174SATA2_TXPLVDS outputlvdsPCIE20_TXP/SATA2_TXP/QSGMII_TXP_M1W27PCIe2.0 transmit differential Positive
175GNDPOWER0N/AN/Areferenced ground of power and signal
176MULTI_PHY1_REFCLKNLVDS outputlvdsMULTI_PHY1_REFCLKNU24MULTI_PHY1 output differential clock Negative for PCIe3.0 EP
177MULTI_PHY1_REFCLKPLVDS outputlvdsMULTI_PHY1_REFCLKPU25MULTI_PHY1 output differential clock Positive for PCIe3.0 EP
178GNDPOWER0N/AN/Areferenced ground of power and signal
179MULTI_PHY0_REFCLKNLVDS outputlvdsMULTI_PHY0_REFCLKNR25MULTI_PHY0 output differential clock Negative for PCIe3.0 EP
180MULTI_PHY0_REFCLKPLVDS outputlvdsMULTI_PHY0_REFCLKPR24MULTI_PHY0 output differential clock Positive for PCIe3.0 EP
181GNDPOWER0N/AN/Areferenced ground of power and signal
182PCIE20_REFCLKNLVDS inputlvdsPCIE20_REFCLKNV25PCIe3.0 differential clock Negative,Support input or output
183PCIE20_REFCLKPLVDS inputlvdsPCIE20_REFCLKPV24PCIe3.0 differential clock Positive,Support input or output
184GNDPOWER0N/AN/Areferenced ground of power and signal
185NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
186NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
187NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
188GNDPOWER0N/AN/Areferenced ground of power and signal
189GNDPOWER0N/AN/Areferenced ground of power and signal
190GNDPOWER0N/AN/Areferenced ground of power and signal
191GMAC0_MDIOIO input/output1.8VI2S2_SDO_M0/GMAC0_MDIO/UART9_CTSn_M0/SPI2_CS0_M0/GPIO2_C4_dH23GAMC0 management data
192GMAC0_MDCIO input/output1.8VI2S2_LRCK_TX_M0/GMAC0_MDC/UART9_RTSn_M0/SPI2_MOSI_M0/GPIO2_C3_dH24GMAC0 management data clock
193GMAC0_MCLKINOUTIO input/output1.8VI2S2_SCLK_TX_M0/GMAC0_MCLKINOUT/UART7_CTSn_M0/SPI2_MISO_M0/GPIO2_C2_dF25GMAC0 Master clock input or output
194ETH0_REFCLKO_25MIO input/output1.8VI2S2_MCLK_M0/ETH0_REFCLKO_25M/UART7_RTSn_M0/SPI2_CLK_M0/GPIO2_C1_dG23CPU Output clock 25MHz for Ethernet PHY0
195GMAC0_RXDV_CRSIO input/output1.8VI2S2_LRCK_RX_M0/GMAC0_RXDV_CRS/UART6_CTSn_M0/SPI1_CS0_M0/GPIO2_C0_dF24GMAC0 receive data valid/carrier sense
196GMAC0_RXD1IO input/output1.8VI2S2_SCLK_RX_M0/GMAC0_RXD1/UART6_RTSn_M0/SPI1_MOSI_M0/GPIO2_B7_dH25GMAC0 receive data 1
197GMAC0_RXD0IO input/output1.8VGMAC0_RXD0/UART1_CTSn_M0/SPI1_MISO_M0/GPIO2_B6_uF27GMAC0 receive data 0
198GMAC0_TXENIO input/output1.8VGMAC0_TXEN/UART1_RTSn_M0/SPI1_CLK_M0/GPIO2_B5_uG28GMAC0 transmit enable
199GMAC0_TXD1IO input/output1.8VGMAC0_TXD1/UART1_TX_M0/GPIO2_B4_uG27GMAC0 transmit data 1
200GMAC0_TXD0IO input/output1.8VGMAC0_TXD0/UART1_RX_M0/GPIO2_B3_uF28GMAC0 transmit data 0
201GMAC0_TXCLKIO input/output1.8VSDMMC1_CLK/GMAC0_TXCLK/UART9_TX_M0/GPIO2_B0_dD27GMAC0 transmit Clock
202GMAC0_TXD3IO input/output1.8VSDMMC1_CMD/GMAC0_TXD3/UART9_RX_M0/GPIO2_A7_uC28GMAC0 transmit data 3
203GMAC0_TXD2IO input/output1.8VSDMMC1_D3/GMAC0_TXD2/UART7_TX_M0/GPIO2_A6_uC27GMAC0 transmit data 2
204GMAC0_RXCLKIO input/output1.8VSDMMC1_D2/GMAC0_RXCLK/UART7_RX_M0/GPIO2_A5_uB28GMAC0 receive clock
205GMAC0_RXD3IO input/output1.8VSDMMC1_D1/GMAC0_RXD3/UART6_TX_M0/GPIO2_A4_uE28GMAC0 receive data 3
206GMAC0_RXD2IO input/output1.8VSDMMC1_D0/GMAC0_RXD2/UART6_RX_M0/GPIO2_A3_uE27GMAC0 receive data 2
207GNDPOWER0N/AN/Areferenced ground of power and signal
208RK809_32KOUT_WIFIIO output3.3VCLK32K6832.768KHz clock output, open drain,pull up default.
209UART8_CTSN_M0IO input/output1.8VSDMMC1_DET/I2C4_SCL_M1/UART8_CTSn_M0/CAN2_TX_M1/GPIO2_B2_uE25UART8 clear to send
210UART8_RTSN_M0IO input/output1.8VSDMMC1_PWREN/I2C4_SDA_M1/UART8_RTSn_M0/CAN2_RX_M1/GPIO2_B1_dD26UART8 request to send
211UART8_RX_M0IO input/output1.8VCLK32K_OUT1/UART8_RX_M0/SPI1_CS1_M0/GPIO2_C6_dE26UART8 receive data
212UART8_TX_M0IO input/output1.8VI2S2_SDI_M0/GMAC0_RXER/UART8_TX_M0/SPI2_CS1_M0/GPIO2_C5_dF26UART8 transmit data
213GNDPOWER0N/AN/Areferenced ground of power and signal
214SARADC_VIN7Analog inputanalog(1.8V max)SARADC_VIN7F21SAR ADC Channel 7 input
215SARADC_VIN6Analog inputanalog(1.8V max)SARADC_VIN6G20SAR ADC Channel 6 input
216SARADC_VIN5Analog inputanalog(1.8V max)SARADC_VIN5F22SAR ADC Channel 5 input
217SARADC_VIN4Analog inputanalog(1.8V max)SARADC_VIN4G21SAR ADC Channel 4 input
218SARADC_VIN3Analog inputanalog(1.8V max)SARADC_VIN3E23SAR ADC Channel 3 input
219SARADC_VIN2_LCD_IDAnalog inputanalog(1.8V max)SARADC_VIN2D24SAR ADC Channel 2 input
220SARADC_VIN1_EVB_HW_IDAnalog inputanalog(1.8V max)SARADC_VIN1C26SAR ADC Channel 1 input
221SARADC_VIN0_KEY/RECOVERYAnalog inputanalog(1.8V max)SARADC_VIN0B27SAR ADC Channel 0 input,with Recovery
222GNDPOWER0N/AN/Areferenced ground of power and signal
223LCD0_RST_L_GPIO1_D1IO input/output1.8VFSPI_D0/FLASH_RDY/GPIO1_D1_uC24GPIO for LCD0 reset
224PCIE_USB_SEL_GPIO1_D0IO input/output1.8VFSPI_CLK/FLASH_ALE/GPIO1_D0_dA22GPIO for select USB or PCIE to M2
225CAMERA0_PWREN_GPIO1_D4IO input/output1.8VFSPI_D3/FLASH_CS1n/GPIO1_D4_uA27GPIO for camera0 power enable
226CRYPTO_RST_GPIO1_D3IO input/output1.8VFSPI_CS0n/FLASH_CS0n/GPIO1_D3_uC23GPIO for crypto chip reset
227M2_ONOFF_GPIO1_D2IO input/output1.8VFSPI_D1/FLASH_RDn/GPIO1_D2_uD23GPIO for M2 on-off key
228GNDPOWER0N/AN/Areferenced ground of power and signal
229I2S1_SCLK_RX_M0/PDM_CLK1_M0IO input/output3.3VI2S1_SCLK_RX_M0/UART4_RX_M0/PDM_CLK1_M0/SPDIF_TX_M0/GPIO1_A4_dF18PDM clock 1
230I2S1_SDO1_M0/I2S1_SDI3_M0/PDM_SDI3_M0IO input/output3.3VI2S1_SDO1_M0/I2S1_SDI3_M0/PDM_SDI3_M0/PCIE20_CLKREQn_M2/ACODEC_DAC_DATAR/GPIO1_B0_dD20PDM data 3 input
231I2S1_SDO2_M0/I2S1_SDI2_M0/PDM_SDI2_M0IO input/output3.3VI2S1_SDO2_M0/I2S1_SDI2_M0/PDM_SDI2_M0/PCIE20_WAKEn_M2/ACODEC_ADC_SYNC/GPIO1_B1_dE20PDM data 2 input
232I2S1_SDO3_M0/I2S1_SDI1_M0/PDM_SDI1_M0IO input/output3.3VI2S1_SDO3_M0/I2S1_SDI1_M0/PDM_SDI1_M0/PCIE20_PERSTn_M2/GPIO1_B2_dA21PDM data 1 input
233GNDPOWER0N/AN/Areferenced ground of power and signal
234GNDPOWER0N/AN/Areferenced ground of power and signal
235GNDPOWER0N/AN/Areferenced ground of power and signal
236NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
237NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
238NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
239NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
240NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
241NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
242NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
243NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
244NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
245NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
246NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
247NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
248NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
249NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
250NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
251NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
252NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
253NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
254NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
255NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
256NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
257NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
258NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
259NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
260NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
261NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
262NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
263NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
264NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
265NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
266NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
267NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
268NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
269NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
270NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
271NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
272NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
273NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
274NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
275NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
276NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
277NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
278GNDPOWER0N/AN/Areferenced ground of power and signal
279GNDPOWER0N/AN/Areferenced ground of power and signal
280GNDPOWER0N/AN/Areferenced ground of power and signal
281GMAC1_RXDV_CRS_M1IO input/output1.8VISP_PRELIGHT_TRIG/EBC_SDCE3/GMAC1_RXDV_CRS_M1/I2S1_SDO2_M1/GPIO4_B1_dV2GMAC1 receive data valid/carrier sense
282GMAC1_RXD1_M1IO input/output1.8VCAM_CLKOUT1/EBC_SDCE2/GMAC1_RXD1_M1/SPI3_MISO_M0/I2S1_SDO1_M1/GPIO4_B0_dV7GMAC1 receive data 1
283GMAC1_RXD0_M1IO input/output1.8VCAM_CLKOUT0/EBC_SDCE1/GMAC1_RXD0_M1/SPI3_CS1_M0/I2S1_LRCK_RX_M1/GPIO4_A7_dW1GMAC1 receive data 0
284GMAC1_TXEN_M1IO input/output1.8VISP_FLASHTRIGOUT/EBC_SDCE0/GMAC1_TXEN_M1/SPI3_CS0_M0/I2S1_SCLK_RX_M1/GPIO4_A6_dW2GMAC1 transmit enable
285GMAC1_TXD1_M1IO input/output1.8VCIF_D15/EBC_SDDO15/GMAC1_TXD1_M1/UART9_RX_M2/I2S2_LRCK_RX_M1/GPIO4_A5_dY1GMAC1 transmit data 1
286GMAC1_TXD0_M1IO input/output1.8VCIF_D14/EBC_SDDO14/GMAC1_TXD0_M1/UART9_TX_M2/I2S2_LRCK_TX_M1/GPIO4_A4_dY2GMAC1 transmit data 0
287GMAC1_RXCLK_M1IO input/output1.8VCIF_D13/EBC_SDDO13/GMAC1_RXCLK_M1/UART7_RX_M2/PDM_SDI3_M1/GPIO4_A3_dY3GMAC1 receive clock
288GMAC1_RXD3_M1IO input/output1.8VCIF_D12/EBC_SDDO12/GMAC1_RXD3_M1/UART7_TX_M2/PDM_SDI2_M1/GPIO4_A2_dY4GMAC1 receive data 3
289GMAC1_RXD2_M1IO input/output1.8VCIF_D11/EBC_SDDO11/GMAC1_RXD2_M1/PDM_SDI1_M1/GPIO4_A1_dAA2GMAC1 receive data 2
290GMAC1_TXCLK_M1IO input/output1.8VCIF_D10/EBC_SDDO10/GMAC1_TXCLK_M1/PDM_CLK1_M1/GPIO4_A0_dAA3GMAC1 transmit Clock
291GMAC1_TXD3_M1IO input/output1.8VCIF_D9/EBC_SDDO9/GMAC1_TXD3_M1/UART1_RX_M1/PDM_SDI0_M1/GPIO3_D7_dY5GMAC1 transmit data 3
292GMAC1_TXD2_M1IO input/output1.8VCIF_D8/EBC_SDDO8/GMAC1_TXD2_M1/UART1_TX_M1/PDM_CLK0_M1/GPIO3_D6_dY6GMAC1 transmit data 2
293GMAC1_RSTN_GPIO2_D1IO input/output1.8VLCDC_D1/VOP_BT656_D1_M0/SPI0_MOSI_M1/PCIE20_WAKEn_M1/I2S1_SCLK_TX_M2/GPIO2_D1_dAD7GPIO OUT for GMAC1 reset
294USB_PWEREN_GPIO2_D0IO input/output1.8VLCDC_D0/VOP_BT656_D0_M0/SPI0_MISO_M1/PCIE20_CLKREQn_M1/I2S1_MCLK_M2/GPIO2_D0_dAG6GPIO OUT for USB power enable
295GMAC1_MCLKINOUT_M1IO input/output1.8VCIF_CLKIN/EBC_SDCLK/GMAC1_MCLKINOUT_M1/UART1_CTSn_M1/I2S2_SCLK_RX_M1/GPIO4_C1_dU2GMAC1 reference clock input or output
296ETH1_REFCLKO_25M_M0IO input/output3.3VLCDC_D15/VOP_BT1120_D6/ETH1_REFCLKO_25M_M0/SDMMC2_PWREN_M1/GPIO3_B0_dAG2CPU Output clock 25MHz for Ethernet PHY1
297GMAC1_MDIO_M1IO input/output1.8VCIF_VSYNC/EBC_SDOE/GMAC1_MDIO_M1/I2S2_SCLK_TX_M1/GPIO4_B7_dU4GAMC1 management data
298GMAC1_MDC_M1IO input/output1.8VCIF_HREF/EBC_SDLE/GMAC1_MDC_M1/UART1_RTSn_M1/I2S2_MCLK_M1/GPIO4_B6_dU5GMAC1 management data clock
299GNDPOWER0N/AN/Areferenced ground of power and signal
300I2C4_SCL_M0IO input/output1.8VI2C4_SCL_M0/EBC_GDOE/ETH1_REFCLKO_25M_M1/SPI3_CLK_M0/I2S2_SDO_M1/GPIO4_B3_dV1I2C4 bus clock for camera
301I2C4_SDA_M0IO input/output1.8VI2C4_SDA_M0/EBC_VCOM/GMAC1_RXER_M1/SPI3_MOSI_M0/I2S2_SDI_M1/GPIO4_B2_dV4I2C4 bus Data/Address for camera
302GNDPOWER0N/AN/Areferenced ground of power and signal
303PWM14_M0IO input/output3.3VPWM14_M0/VOP_PWM_M1/GMAC1_MDC_M0/UART7_TX_M1/PDM_CLK1_M2/GPIO3_C4_dAC3Pulse Width Modulation 14 input or output
304CAMERA0_RST_L_GPIO4_B5IO input/output3.3VI2C2_SCL_M1/EBC_SDSHR/CAN2_TX_M0/I2S1_SDO3_M1/GPIO4_B5_dV5GPIO OUT For Camera0 reset
305CAMERA0_PDN_L_GPIO4_B4IO input/output3.3VI2C2_SDA_M1/EBC_GDSP/CAN2_RX_M0/ISP_FLASH_TRIGIN/VOP_BT656_CLK_M1/GPIO4_B4_dV6GPIO OUT For Camera0 power down
306LCD1_RST_L_GPIO3_B6IO input/output3.3VLCDC_D21/VOP_BT1120_D12/GMAC1_TXD1_M0/I2C3_SDA_M1/PWM11_IR_M0/GPIO3_B6_dAE3GPIO out for LCD0 reset
307M2_RESET_GPIO3_B5IO input/output3.3VLCDC_D20/VOP_BT1120_D11/GMAC1_TXD0_M0/I2C3_SCL_M1/PWM10_M0/GPIO3_B5_dAE2GPIO out for m2 reset
308GNDPOWER0N/AN/Areferenced ground of power and signal
309SDMMC2_CLK_M0IO input/output3.3VCIF_D5/EBC_SDDO5/SDMMC2_CLK_M0/I2S1_SDI1_M1/VOP_BT656_D5_M1/GPIO3_D3_dAC1SDMMC2 Clock
310SDMMC2_CMD_M0IO input/output3.3VCIF_D4/EBC_SDDO4/SDMMC2_CMD_M0/I2S1_SDI0_M1/VOP_BT656_D4_M1/GPIO3_D2_dY7SDMMC2 Command
311SDMMC2_D0_M0IO input/output3.3VCIF_D0/EBC_SDDO0/SDMMC2_D0_M0/I2S1_MCLK_M1/VOP_BT656_D0_M1/GPIO3_C6_dAC5SDMMC2 data 0
312SDMMC2_D1_M0IO input/output3.3VCIF_D1/EBC_SDDO1/SDMMC2_D1_M0/I2S1_SCLK_TX_M1/VOP_BT656_D1_M1/GPIO3_C7_dAA6SDMMC2 data 1
313SDMMC2_D2_M0IO input/output3.3VCIF_D2/EBC_SDDO2/SDMMC2_D2_M0/I2S1_LRCK_TX_M1/VOP_BT656_D2_M1/GPIO3_D0_dAB5SDMMC2 data 2
314SDMMC2_D3_M0IO input/output3.3VCIF_D3/EBC_SDDO3/SDMMC2_D3_M0/I2S1_SDO0_M1/VOP_BT656_D3_M1/GPIO3_D1_dAB1SDMMC2 data 3
315GNDPOWER0N/AN/Areferenced ground of power and signal
316UART5_TX_M1_GPIO3_C2IO input/output3.3VLCDC_VSYNC/VOP_BT1120_D14/SPI1_MISO_M1/UART5_TX_M1/I2S1_SDO3_M2/GPIO3_C2_dAA7UART serial data output
317EDP_BL_EN_GPIO3_C1IO input/output3.3VLCDC_HSYNC/VOP_BT1120_D13/SPI1_MOSI_M1/PCIE20_PERSTn_M1/I2S1_SDO2_M2/GPIO3_C1_dAD1GPIO for edp blacklight enable
318GNDPOWER0N/AN/Areferenced ground of power and signal
319I2C1_SDA_TPIO input/output3.3VI2C1_SDA/CAN0_RX_M0/PCIE20_BUTTONRSTn/MCU_JTAG_TCK/GPIO0_B4_uAB20I2C1 bus Data/Address touch panel
320I2C1_SCL_TPIO input/output3.3VI2C1_SCL/CAN0_TX_M0/PCIE30X1_BUTTONRSTn/MCU_JTAG_TDO/GPIO0_B3_uAG24I2C1 bus clock for touch panel
321TP_RST_L_GPIO0_B6IO input/output3.3VI2C2_SDA_M0/SPI0_MOSI_M0/PCIE20_PERSTn_M0/PWM2_M1/GPIO0_B6_uAA20GPIO out for touch panel reset
322TP_INT_L_GPIO0_B5IO input/output3.3VI2C2_SCL_M0/SPI0_CLK_M0/PCIE20_WAKEn_M0/PWM1_M1/GPIO0_B5_uAC22GPIO in for touch panel interrup
323GNDPOWER0N/AN/Areferenced ground of power and signal
324GNDPOWER0N/AN/Areferenced ground of power and signal
325GNDPOWER0N/AN/Areferenced ground of power and signal
326HDMITX_SCLIO input/output3.3VHDMITX_SCL/I2C5_SCL_M1/GPIO4_C7_uAG8HDMI2.0 TX I2C bus Clock
327HDMITX_SDAIO input/output3.3VHDMITX_SDA/I2C5_SDA_M1/GPIO4_D0_uAG7HDMI2.0 TX I2C bus Data/Address
328HDMITX_CEC_M0IO input/output3.3VHDMITX_CEC_M0/SPI3_CS1_M1/GPIO4_D1_uAH6HDMI2.0 TX CEC
329HDMI_TX_HPDINIO input3.3V/5VHDMI_TX_HPDINAB18HDMI2.0  Hot Plug Detection interrupt with 5V tolerance
330GNDPOWER0N/AN/Areferenced ground of power and signal
331LCD1_PWREN_H_GPIO4_D2IO input/output3.3VGPIO4_D2_dAB9GPIO for LCD1 power enable
332SATA0_LEDIO input/output3.3VPWM13_M1/SPI3_CS0_M1/SATA0_ACT_LED/UART9_RX_M1/I2S3_SDI_M1/GPIO4_C6_dAE8SATA0 LED control output
333EDP_PWM12_GPIO4_C5IO input/output3.3VPWM12_M1/SPI3_MISO_M1/SATA1_ACT_LED/UART9_TX_M1/I2S3_SDO_M1/GPIO4_C5_dAD8Pulse Width Modulation 12  output for edp backlight
334SATA2_LEDIO input/output3.3VEDP_HPDIN_M0/SPDIF_TX_M2/SATA2_ACT_LED/PCIE30X2_PERSTn_M2/I2S3_LRCK_M1/GPIO4_C4_dAH7SATA2 LED control output
335CAN1_TX_M1_GPIO4_C3IO input/output3.3VPWM15_IR_M1/SPI3_MOSI_M1/CAN1_TX_M1/PCIE30X2_WAKEn_M2/I2S3_SCLK_M1/GPIO4_C3_dAA11CAN1 transmit data
336CAN1_RX_M1_GPIO4_C2IO input/output3.3VPWM14_M1/SPI3_CLK_M1/CAN1_RX_M1/PCIE30X2_CLKREQn_M2/I2S3_MCLK_M1/GPIO4_C2_dAF8CAN1 receive data
337GNDPOWER0N/AN/Areferenced ground of power and signal
338HP_IN_GPIO3_A7IO input/output3.3VLCDC_D14/VOP_BT1120_D5/GMAC1_RXCLK_M0/SDMMC2_DET_M1/GPIO3_A7_dAH2GPIO for headphone input detcect
339U2_EN_GPIO2_D7IO input/output3.3VLCDC_D7/VOP_BT656_D7_M0/SPI2_MISO_M1/UART8_TX_M1/I2S1_SDO0_M2/GPIO2_D7_dAH5GPIO out for U2 power output enable
340PCIE30X2_PERSTN_M1IO input/output3.3VLCDC_D6/VOP_BT656_D6_M0/SPI2_MOSI_M1/PCIE30X2_PERSTn_M1/I2S1_SDI3_M2/GPIO2_D6_dAD6PCIe3.0 X2Lane Global reset
341PCIE30X2_WAKEN_M1IO input/output3.3VLCDC_D5/VOP_BT656_D5_M0/SPI2_CS0_M1/PCIE30X2_WAKEn_M1/I2S1_SDI2_M2/GPIO2_D5_dAF6PCIe3.0 X2Lane Wake
342PCIE30X2_CLKREQN_M1IO input/output3.3VLCDC_D4/VOP_BT656_D4_M0/SPI2_CS1_M1/PCIE30X2_CLKREQn_M1/I2S1_SDI1_M2/GPIO2_D4_dAF5PCIe3.0 x2Lane Reference clock request
343GNDPOWER0N/AN/Areferenced ground of power and signal
344I2C0_SDA_PMICIO input/output3.3VI2C0_SDA/GPIO0_B2_uAB21I2C0 bus Data/Address
345I2C0_SCL_PMICIO input/output3.3VI2C0_SCL/GPIO0_B1_uAF24I2C0 bus clock
346GMAC1_INT_GPIO0_A6IO input/output3.3VGPU_PWREN/SATA_CP_POD/PCIE30X2_CLKREQn_M0/GPIO0_A6_dAE24GPIO in for Gmac1 interrupt
347WL_EN_GPIO0_A5IO input/output3.3VSDMMC0_PWREN/SATA_MP_SWITCH/PCIE20_CLKREQn_M0/GPIO0_A5_dAF25GPIO for wifi enable
348GNDPOWER0N/AN/Areferenced ground of power and signal
349RECOVERY_GPIO0_D6IO input/output1.8VGPIO0_D6_dAC24GPIO for Recovery button
350WL_WAKE_GPIO0_D5IO input/output1.8VGPIO0_D5_dAD25GPIO for wifi wakeup
351PCIE_PWREN_H_GPIO0_D4IO input/output1.8VGPIO0_D4_dAB23GPIO out for pcie power enable
352RTCIC_INT_L_GPIO0_D3IO input/output1.8VGPIO0_D3_dAE26GPIO in for RTC interrup
353GNDPOWER0N/AN/Areferenced ground of power and signal
354LCD0_PWREN_H_GPIO0_C7IO input/output3.3VHDMITX_CEC_M1/PWM0_M1/UART0_CTSn/GPIO0_C7_dAH25GPIO out for LCD0 power enable
355MINIPCIE_PWREN_H_GPIO0_C5IO input/output3.3VPWM6/SPI0_MISO_M0/PCIE30X2_WAKEn_M0/GPIO0_C5_dAC21GPIO out for MINIPCIE Power enable
356LCD1_BL_PWM5IO input/output3.3VPWM5/SPI0_CS1_M0/UART0_RTSn/GPIO0_C4_dAD21Pulse Width Modulation 5
357LCD0_BL_PWM4IO input/output3.3VPWM4/VOP_PWM_M0/PCIE30X1_PERSTn_M0/MCU_JTAG_TRSTn/GPIO0_C3_dAE23LCD Backlight Pulse Width Modulation
358EDP_HPD_GPIO0_C2IO input/output3.3VPWM3_IR/EDP_HPDIN_M1/PCIE30X1_WAKEn_M0/MCU_JTAG_TMS/GPIO0_C2_dAG23EDP hot plug detect signal
359VCC3V3_SDPOWER output3.3V/1.8VSWOUT258Power switch out 2,Power for SD socket
360SDMMC0_DET_LIO input/output3.3VSDMMC0_DET/SATA_CP_DET/PCIE30X1_CLKREQn_M0/GPIO0_A4_uY22SDMMC0 detect input
361SDMMC0_CLKIO input/output3.3VSDMMC0_CLK/TEST_CLKOUT/UART5_TX_M0/CAN0_RX_M1/GPIO2_A2_dH28SDMMC0 Clock
362SDMMC0_CMDIO input/output3.3VSDMMC0_CMD/PWM10_M1/UART5_RX_M0/CAN0_TX_M1/GPIO2_A1_uH27SDMMC0 Command
363SDMMC0_D3IO input/output3.3VSDMMC0_D3/ARMJTAG_TMS/UART5_RTSn_M0/GPIO2_A0_uJ23SDMMC0 data 3
364SDMMC0_D2IO input/output3.3VSDMMC0_D2/ARMJTAG_TCK/UART5_CTSn_M0/GPIO1_D7_uH26SDMMC0 data 2
365SDMMC0_D1IO input/output3.3VSDMMC0_D1/UART2_RX_M1/UART6_RX_M1/PWM9_M1/GPIO1_D6_uJ24SDMMC0 data 1
366SDMMC0_D0IO input/output3.3VSDMMC0_D0/UART2_TX_M1/UART6_TX_M1/PWM8_M1/GPIO1_D5_uJ25SDMMC0 data 0
367PWM7_IRIO input/output3.3VPWM7_IR/SPI0_CS0_M0/PCIE30X2_PERSTn_M0/GPIO0_C6_dAD20Pulse Width Modulation 7 input for IR receiver
368GNDPOWER0N/AN/Areferenced ground of power and signal
369GNDPOWER0N/AN/Areferenced ground of power and signal
370VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
371VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
372VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
373VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
374VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
375VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
376VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
377VCC3V3_VINPOWER input3.3VN/AN/APower supply for PMU to all DCDC and LDO
378GNDPOWER0N/AN/Areferenced ground of power and signal
379GNDPOWER0N/AN/Areferenced ground of power and signal
380GNDPOWER0N/AN/Areferenced ground of power and signal
381GNDPOWER0N/AN/Areferenced ground of power and signal
382GNDPOWER0N/AN/Areferenced ground of power and signal
383GNDPOWER0N/AN/Areferenced ground of power and signal
384GNDPOWER0N/AN/Areferenced ground of power and signal
385GNDPOWER0N/AN/Areferenced ground of power and signal
386VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
387VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
388VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
389VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
390VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
391VCC5V_CPUPOWER input5VN/AN/APower supply for DCDC to CPU
392GNDPOWER0N/AN/Areferenced ground of power and signal
393GNDPOWER0N/AN/Areferenced ground of power and signal
394GNDPOWER0N/AN/Areferenced ground of power and signal
395GNDPOWER0N/AN/Areferenced ground of power and signal
396GNDPOWER0N/AN/Areferenced ground of power and signal
397GNDPOWER0N/AN/Areferenced ground of power and signal
398EXT_ENIO output3.3VEXT_EN60Enable Signal for external high voltage BUCK
399VDCAnalog inputanalogVDC61If it exceeds 0.55V for the first time, it will start the
PMIC(rising edge triggering start).And it is connected to the
divider of external power supply generally.
400PWRON_KEYIO input3.3VPWRON52Power on key input, active low, internal 17k resistor pull high
to VCC_RTC
401RESET_KEYIO input3.3VRESETB67Reset pin after power on, active low,pull up default.
402GNDPOWER0N/AN/Areferenced ground of power and signal
403BAT_GNDNAnalog inputanalogSNSN63Bat charging and discharging sense current negative pin
404BAT_GNDPAnalog inputanalogSNSP62Bat charging and discharging sense current positive pin
405VBATAnalog inputanalogBATDIV56Divided voltage of positive battery
406GNDPOWER0N/AN/Areferenced ground of power and signal
407USB3_OTG0_VBUSDETIO input3.3VUSB3_OTG0_VBUSDETM24USB3 OTG0 connected vbus power detect
408USB3_OTG0_IDIO input3.3VUSB3_OTG0_IDL23USB3 OTG0 ID detect
409NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
410GNDPOWER0N/AN/Areferenced ground of power and signal
411GNDPOWER0N/AN/Areferenced ground of power and signal
412GNDPOWER0N/AN/Areferenced ground of power and signal
413I2C3_SDA_M0IO input/output3.3VI2C3_SDA_M0/UART3_RX_M0/CAN1_RX_M0/AUDIOPWM_LOUT_P/ACODEC_ADC_DATA/GPIO1_A0_uD18I2C3 bus Data/Address
414I2C3_SCL_M0IO input/output3.3VI2C3_SCL_M0/UART3_TX_M0/CAN1_TX_M0/AUDIOPWM_LOUT_N/ACODEC_ADC_CLK/GPIO1_A1_uE18I2C3 bus clock
415GNDPOWER0N/AN/Areferenced ground of power and signal
416MASKROM_KEYIO input1.8VEMMC_D0/FLASH_D0/GPIO1_B4_uA24for booting from emmc or USB after reset
417GNDPOWER0N/AN/Areferenced ground of power and signal
418NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
419NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
420NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
421NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
422NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
423NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
424NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
425NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
426NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
427NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
428NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
429NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
430NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
431NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
432NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
433NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
434NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
435NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
436NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
437NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
438NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
439NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
440NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
441NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
442NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
443NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
444NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
445NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
446NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
447NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
448NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
449NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
450NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
451NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
452GNDPOWER0N/AN/Areferenced ground of power and signal
453GNDPOWER0N/AN/Areferenced ground of power and signal
454GNDPOWER0N/AN/Areferenced ground of power and signal
455NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
456NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
457NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
458NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
459NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
460NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
461NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
462NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
463NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
464NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
465NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
466GNDPOWER0N/AN/Areferenced ground of power and signal
467CIF_CLKOUTIO input/output1.8VCIF_CLKOUT/EBC_GDCLK/PWM11_IR_M1/GPIO4_C0_dU3Camera Master clock output for parallel interface
468GNDPOWER0N/AN/Areferenced ground of power and signal
469USBHUB_RESET_GPIO3_B4IO input/output3.3VLCDC_D19/VOP_BT1120_D10/GMAC1_RXER_M0/I2C5_SDA_M0/PDM_SDI1_M2/GPIO3_B4_dAE1GPIO for USB HUB reset
470PCIE_CLKEN_GPIO3_B3IO input/output3.3VLCDC_D18/VOP_BT1120_D9/GMAC1_RXDV_CRS_M0/I2C5_SCL_M0/PDM_SDI0_M2/GPIO3_B3_dAF1GPIO for PCIE 100MHz clock enable
471GNDPOWER0N/AN/Areferenced ground of power and signal
472SPDIF_TX_M1IO input/output3.3VPWM15_IR_M0/SPDIF_TX_M1/GMAC1_MDIO_M0/UART7_RX_M1/I2S1_LRCK_RX_M2/GPIO3_C5_dAC2SPDIF transmit
473GNDPOWER0N/AN/Areferenced ground of power and signal
474UART5_RX_M1_GPIO3_C3IO input/output3.3VLCDC_DEN/VOP_BT1120_D15/SPI1_CLK_M1/UART5_RX_M1/I2S1_SCLK_RX_M2/GPIO3_C3_dAC4UART serial data input
475UART3_RX_M1IO input/output3.3VLCDC_D23/PWM13_M0/GMAC1_MCLKINOUT_M0/UART3_RX_M1/PDM_SDI3_M2/GPIO3_C0_dAD2UART3 receive data
476UART3_TX_M1IO input/output3.3VLCDC_D22/PWM12_M0/GMAC1_TXEN_M0/UART3_TX_M1/PDM_SDI2_M2/GPIO3_B7_dAD4UART3 transmit data
477GNDPOWER0N/AN/Areferenced ground of power and signal
478BEEP_EN_GPIO3_D5IO input/output1.8VCIF_D7/EBC_SDDO7/SDMMC2_PWREN_M0/I2S1_SDI3_M1/VOP_BT656_D7_M1/GPIO3_D5_dAA5GPIO for beep enable
479MINIPCIE_RESET_GPIO3_D4IO input/output1.8VCIF_D6/EBC_SDDO6/SDMMC2_DET_M0/I2S1_SDI2_M1/VOP_BT656_D6_M1/GPIO3_D4_dAA1GPIO for MiniPCIE reset
480HOST_WAKE_BT_H_GPIO3_A2IO input/output3.3VLCDC_D9/VOP_BT1120_D1/GMAC1_TXD2_M0/I2S3_MCLK_M0/SDMMC2_D1_M1/GPIO3_A2_dAE5GPIO OUT for Host wakeup BT
481BT_WAKE_HOST_H_GPIO3_A1IO input/output3.3VLCDC_D8/VOP_BT1120_D0/SPI1_CS0_M1/PCIE30X1_PERSTn_M1/SDMMC2_D0_M1/GPIO3_A1_dAB8GPIO IN For BT wakeup Host
482BT_REG_ON_H_GPIO3_A0IO input/output3.3VLCDC_CLK/VOP_BT656_CLK_M0/SPI2_CLK_M1/UART8_RX_M1/I2S1_SDO1_M2/GPIO3_A0_dAH4GPIO OUT For BT enable
483GNDPOWER0N/AN/Areferenced ground of power and signal
484UART4_TX_M1IO input/output3.3VLCDC_D17/VOP_BT1120_D8/GMAC1_RXD1_M0/UART4_TX_M1/PWM9_M0/GPIO3_B2_dAF2UART4 transmit data
485UART4_RX_M1IO input/output3.3VLCDC_D16/VOP_BT1120_D7/GMAC1_RXD0_M0/UART4_RX_M1/PWM8_M0/GPIO3_B1_dAG1UART4 receive data
486GNDPOWER0N/AN/Areferenced ground of power and signal
487GMAC0_RSTN_GPIO2_D3IO input/output1.8VLCDC_D3/VOP_BT656_D3_M0/SPI0_CLK_M1/PCIE30X1_WAKEn_M1/I2S1_SDI0_M2/GPIO2_D3_dAC7GPIO OUT for GMAC0 reset
488GMAC0_INT/PMEB_GPIO2_D2IO input/output1.8VLCDC_D2/VOP_BT656_D2_M0/SPI0_CS0_M1/PCIE30X1_CLKREQn_M1/I2S1_LRCK_TX_M2/GPIO2_D2_dAC8GPIO IN For GMAC0 interrup
489GNDPOWER0N/AN/Areferenced ground of power and signal
490I2S3_SDI_M0IO input/output3.3VLCDC_D13/VOP_BT1120_CLK/GMAC1_TXCLK_M0/I2S3_SDI_M0/SDMMC2_CLK_M1/GPIO3_A6_dAG3I2S3 data input
491I2S3_SDO_M0IO input/output3.3VLCDC_D12/VOP_BT1120_D4/GMAC1_RXD3_M0/I2S3_SDO_M0/SDMMC2_CMD_M1/GPIO3_A5_dAH3I2S3 data output
492I2S3_LRCK_M0IO input/output3.3VLCDC_D11/VOP_BT1120_D3/GMAC1_RXD2_M0/I2S3_LRCK_M0/SDMMC2_D3_M1/GPIO3_A4_dAF4I2S3 Left Right channel clock
493I2S3_SCLK_M0IO input/output3.3VLCDC_D10/VOP_BT1120_D2/GMAC1_TXD3_M0/I2S3_SCLK_M0/SDMMC2_D2_M1/GPIO3_A3_dAG4I2S3 serial clock
494GNDPOWER0N/AN/Areferenced ground of power and signal
495GNDPOWER0N/AN/Areferenced ground of power and signal
496GNDPOWER0N/AN/Areferenced ground of power and signal
497NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
498NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
499NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
500NCNOT CONNECTEDfloatN/AN/ANOT CONNECTED
501GNDPOWER0N/AN/Areferenced ground of power and signal
502WAKEUP_MINIPCIE_GPIO0_C1IO input/output3.3VPWM2_M0/NPUAVS/UART0_TX/MCU_JTAG_TDI/GPIO0_C1_dAF23GPIO for MiniPCIE wakeup
503CLK32K_OUT0IO input/output3.3VCLK32K_IN/CLK32K_OUT0/PCIE30X2_BUTTONRSTn/GPIO0_B0_uAD23SOC output 32.768KHz clock 0
504REFCLK_OUT_CAMIO input/output3.3VREFCLK_OUT/GPIO0_A0_dAG27Reference clock output for camera
505GNDPOWER0N/AN/Areferenced ground of power and signal
506M2_WAKE_GPIO0_B7IO input/output3.3VPWM0_M0/CPUAVS/GPIO0_B7_dAH26GPIO for M2 wakeup
507WORKING_LEDEN_H_GPIO0_C0IO input/output3.3VPWM1_M0/GPUAVS/UART0_RX/GPIO0_C0_dAD22GPIO out for working led blink
508GNDPOWER0N/AN/Areferenced ground of power and signal
509UART2_TX_M0_DEBUGIO input/output3.3VUART2_TX_M0/GPIO0_D1_uAH24UART2 transmit data
510UART2_RX_M0_DEBUGIO input/output3.3VUART2_RX_M0/GPIO0_D0_uAC20UART2 receive data
511GNDPOWER0N/AN/Areferenced ground of power and signal
512HPR_OUTAnalog outputanalogHPR_OUT41Right channel output of the headphone
513HP_SNSAnalog outputanalogHP_SNS40Reference ground for the headphone
514HPL_OUTAnalog outputanalogHPL_OUT39Left channel output of the headphone
515GNDPOWER0N/AN/Areferenced ground of power and signal
516MIC1NAnalog inputanalogMICIN42Negative input of the Microphone
517MIC1PAnalog inputanalogMICIP43Positive input of the Microphone
518GNDPOWER0N/AN/Areferenced ground of power and signal
519SPK_OUTPAnalog outputanalogSPKP_OUT32Positive speaker driver output
520SPK_OUTPAnalog outputanalogSPKP_OUT32Positive speaker driver output
521SPK_OUTNAnalog outputanalogSPKN_OUT34Negative speaker driver output.
522SPK_OUTNAnalog outputanalogSPKN_OUT34Negative speaker driver output.
523GNDPOWER0N/AN/Areferenced ground of power and signal
524GNDPOWER0N/AN/Areferenced ground of power and signal
525GNDPOWER0N/AN/Areferenced ground of power and signal
526GNDPOWER0N/AN/Areferenced ground of power and signal
527VCC_1V8POWER output1.8VN/AN/APower output to supply 1.8V devices
528VCC_1V8POWER output1.8VN/AN/APower output to supply 1.8V devices
529VCC_1V8POWER output1.8VN/AN/APower output to supply 1.8V devices
530VCC_1V8POWER output1.8VN/AN/APower output to supply 1.8V devices
531GNDPOWER0N/AN/Areferenced ground of power and signal
532GNDPOWER0N/AN/Areferenced ground of power and signal
533GNDPOWER0N/AN/Areferenced ground of power and signal
534VCC5V0_SPKPOWER input5VVCC_SPK_HP33Power supply for speaker and charger pump
535VCC5V0_SPKPOWER input5VVCC_SPK_HP33Power supply for speaker and charger pump
536VCC5V0_SPKPOWER input5VVCC_SPK_HP33Power supply for speaker and charger pump

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