High-Performance Stackable SBC
Mixtile Blade 3 is a low-cost, low-power single-board computer (SBC) powered by the cutting-edge, 8-nanometer Rockchip RK3588 CPU. This power-efficient chipset makes Blade 3 ideal for quick development, AI-application prototyping, and edge computing. You can easily scale your deployment by clustering multiple Blade 3 boards together via the four-lane PCIe Gen3 port. This enables flexible, high-performance edge computing while maintaining a minimal carbon footprint.
Blade 3 Case is designed specifically for the needs and functionality of the Mixtile Blade 3. Integrating M.2 NVMe SSD support, this case has built-in fans for heat dissipation.
Highlights
- Strong scalability and wide applications
The mini PCIe interface and 30-pin GPIO header allow for easy expansion. The U.2 edge connector provides 12 V power, PCIe Gen 3.0 x 4, and SATA signals to interface with other Mixtile boards and build clusters. This makes Mixtile Blade 3 ideal for AI, edge computing, and image data processing applications requiring high bandwidth and scalability.
- Rich display interfaces, up to 8K video decoding
The HDMI 2.1 output port enables up to 8K@60fps display, while the HDMI 2.0 input port allows for up to 4K@60fps capture. Two 1.4a DisplayPorts over Type-C provide additional display connectivity at up to 8K@30fps. For video input, the 4-lane MIPI-CSI interface is included.
Powerful H.265/VP9 hardware decoding up to 8K@60fps and H.264/H.265 encoding up to 8K@30fps enables real-time video processing on the board.
- Wide range of OS compatibility
Mixtile Blade 3 offers compatibility with various operating systems, including Ubuntu, Armbian, and Debian. Upcoming support for Android and OpenWrt will open up even more possibilities.
- Portable 2.5-inch Pico-ITX Mainboard
With a standard Pico-ITX mainboard (100 x 72 mm) and standard interfaces, Mixtile Blade 3 is designed for space-constrained embedded applications. The compact form factor meets the growing market demand and highly customized requirements of the Industrial IoT industry.
Block Diagram
Technical Specifications
| CPU | Rockchip Octa-core Cortex-A76/A55 SoC processor RK3588 |
| NPU | Up to 6 TOPS |
| Memory | 32 GB LPDDR4 memory |
| Storage | 256 GB eMMC storage |
| HDMI interface | HDMI 2.1 output (8K @ 60 FPS or 4K @ 120 FPS) HDMI 2.0 input (4K @ 60 FPS) |
| Video encoder | H.264/H.265 video encoder up to 8K @ 30 FPS |
| Video decoder | H.265/H.264/VP9 video decoder up to 8K @ 60 FPS |
| Camera Input | 4-lane MIPI-CSI |
| PCIe expansion | Mini-PCIe socket with PCIe Gen 2.1, USB 2.0 support |
| Storage expansion | 4-lane PCIe Gen 3 in U.2 port SATA 3.0 in U.2 port, Micro-SD 3.0 flash socket |
| Ethernet expansion | Dual 2.5 Gigabit Ethernet ports |
| USB | Dual USB 3.2 Gen 1 Type-C ports, DisplayPort 1.4 A |
| GPIOs | 40-pin GPIO socket: Digital I/O, I²C, USB 2.0, TTL UART, SPI, I²S |
| Software support | Preloaded customized Debian 11, other Linux distributions and Android 12 |
| Power | USB Type-C port-1 supports USB PD 2.0 protocol (Optional: 12 V DC standard SATA power input via U.2 port) Note: The power adapter must support PD2.0 or PD3.0 protocol. Use a USB C to USB C cable for connection. |
| Output Voltage | 5 V DC |
| Operating Current | Maximum 3 A @ 20 V DC |
| Blade 3 dimensions | 2.5-inch Pico-ITX form factor, 100 x 72 mm |
| Blade 3 Case material | Aluminium alloy, black anodized |
| Blade 3 case dimensions | 112.4mm x 89mm x 27.4mm |
| Operating temperature | 0 to +80°C |
Functional Description
This section provides a detailed description to the following components of Blade 3:
- MicroSD socket
- Mini-PCIe socket
- Ethernet ports
- USB-C ports (Power port/Display port)
- HDMI ports (HDMI Out/HDMI In)
- U.2 connector
- LED
- Dip switch
MicroSD Socket
The MicroSD socket accepts standard 11 mm x 15 mm Micro-SD cards with capacities up to 64 GBytes. The 4-bit data interface supports the SDMMC3.0 protocol. Blade 3 boots from eMMC flash by default and can be changed to boot from a MicroSD card.
Mini-PCIe Socket
The module supporting configuration, including power, reset, and interrupt signals, is under software control by Core 3588. Since each module needs specific configuration definitions, check the configuration setting before connecting the module.
The mini-PCIe is a PCI card interface with a small form factor that uses a standard 52-pin mini-PCIe socket. It also contains a USB 2.0 interface. The mini-PCIe socket supports the module sizes of 3052.
Dual 2.5 Gigabit Ethernet
The IEEE 802.3 compliant Ethernet supports auto-negotiation of 10 Mbps, 100 Mbps, 1 Gbps, and 2.5 Gbps data rates in both half-duplex and full-duplex modes. The RGMII interface from the processor connects the 2.5GbE to an external PHY, RTL8125BG-CG. The RJ45 connector has some status and speed lights:
- Green light: A valid link is established
- Flashing light: Data is being transmitted
- Yellow light: Link speed is 2500 Mbps
- Off: 10/100/1000 Mbps
Power Input
Power Delivery (PD)
USB1/PD Port of Blade 3 supports USB Power Delivery 2.0. A Power Delivery controller on-board allows for a maximum power input of 20 V@3 A.
12 V DC
DC power inputs from a DC SATA power via U.2 port require 12 V@3 A.
USB-C Port
Blade 3 features two USB-C ports. There is silkscreen on PCB to indicate two USB-C ports:
- “USB0/ADB” Type-C port near the HDMI port: supports USB-OTG and can be used for ADB debugging and firmware update.
- “USB1/PD” Type-C port near the corner of the board: supports USB PD 2.0 for power input and does not support USB-OTG.
Both ports support USB host and DisplayPort modes. DisplayPort over USB-C enables audio/video (AV) data transfer. The ports support DisplayPort 1.4 and have a maximum resolution of 7680 x 4320@30 Hz.
Display Support
The video output processor supports the resolution from 1920 x 1080@60 Hz to 7680 x 4320@60 Hz. The default main display is HDMI.
HDMI-OUT
This port complies with HDMI 1.4, HDMI 2.1, and HDCP 2.3. It supports up to 1920 x 1080@120 Hz and 7680 x 4320@60 Hz/3840 x 2160@120 Hz resolution.
HDMI-IN
This port complies with HDMI 1.4, HDMI 2.0, and HDCP 2.3. It supports input source up to 1920 x 1080@120 Hz and 3840 x 2160@60 Hz resolution.
U.2 Connector
The U.2 interface employs a 68-pin U.2 connector with a standard SATA signal, a SATA 3.0 signal, a PCIe 3.0 x4 signal (four-lane PCIe 3.0), and 12V power input.
LED and Dip Switch
The power LED indicates the status of the power supply.
Blade 3 has an SPST four-position dip switch that can be used to determine the system booting mode.
- When position 1 is turned to ON, Blade 3 boots from eMMC.
- When position 2 is turned to ON, Blade 3 boots from the MicroSD card.
- When position 3 is turned to ON, Blade 3 boots from SPI Flash.
- When position 4 is turned to ON, Blade 3 enters MaskROM mode for firmware development.
Note:
- Only one position can be turned to ON at a time.
- When none of the four positions is ON, the CPU automatically searches for available boot media and boots from it. The boot order is EMMC -> SD Card -> MaskROM Mode.
Block Diagram
Connectors & Pin assignments
This section lists Blade 3 connector and pin assignments, and pin types with corresponding signal descriptions.
30-Pin connector
| Pin# | PinName | PinType | Input/Output | Signal Description |
| 1 | VCC_5V0 | Power | Output | Power supply for USB, 5 V output MAX 500 mA |
| 2 | GND | Power | NA | Power and signal reference ground |
| 3 | USB20_HOST0_DM | LVDS | BI | USB20 HOST Port0 Data Minus |
| 4 | I2S2_SDI_M1 | signal | Input | I2S2 data input |
| 5 | USB20_HOST0_DP | LVDS | BI | USB20 HOST Port0 Data Plus |
| 6 | I2S2_SDO_M1 | signal | Output | I2S2 data output |
| 7 | GND | Power | NA | Power and signal reference ground |
| 8 | I2S2_MCLK_M1 | signal | Output | I2S2 Master clock |
| 9 | I2C5_SDA_M3 | signal | BI | I2C5 Bus Date |
| 10 | I2S2_SCLK_M1 | signal | BI | I2S2 serial clock or BCLK |
| 11 | I2C5_SCL_M3 | signal | Output | I2C5 Bus clock |
| 12 | I2S2_LRCK_M1 | signal | BI | I2S2 Left/Right channel clock |
| 13 | GND | Power | NA | Power and signal reference ground |
| 14 | GND | Power | NA | Power and signal reference ground |
| 15 | SPI4_MISO_M2 | signal | Input | SPI4 Master input, Slave output |
| 16 | CAN2_RX | signal | Input | CAN2 receive data |
| 17 | SPI4_MOSI_M2 | signal | Output | SPI4 Master output, Slave input |
| 18 | CAN2_TX | signal | Output | CAN2 transmit data |
| 19 | SPI4_CLK_M2 | signal | Output | SPI4 clock |
| 20 | GND | Power | NA | Power and signal reference ground |
| 21 | SPI4_CS0_M2 | signal | Output | SPI4 Chip Select 0 |
| 22 | GPIO0_B0 | signal | BI | GPIO bank 0 port B0 |
| 23 | GPIO1_A4 | signal | BI | GPIO bank 1 port A4 |
| 24 | SARADC_VIN7 | Analog | Input | SAR ADC Channel 7 input |
| 25 | GND | Power | NA | Power and signal reference ground |
| 26 | SARADC_VIN6 | Analog | Input | SAR ADC Channel 6 input |
| 27 | PWM14 | signal | BI | Pulse Width Modulation 14 input or output |
| 28 | GND | Power | NA | Power and signal reference ground |
| 29 | PWM15 | signal | BI | Pulse Width Modulation 15 input or output |
| 30 | VCC_3V3_S0 | Power | Output | Power supply for peripheral, 3.3 V output MAX 500 mA |
Fan Connector
| Pin# | PinName | PinType | Input/Output | Signal Description |
| 1 | VCC5V_FAN | Power | Output | Power supply for FAN,5V output MAX 400 mA. Controlled by GPIO3_C0 |
| 2 | GND | Power | NA | Power and signal reference ground |
Mini-PCIe
| Pin# | PinName | PinType | Input/Output | Signal Description |
| 1 | MINIPCIE20_WAKEN_3V3_L | signal | Input | Wake up signal from mini-PCIe device |
| 2 | VCC3V3_MINIPCIE | Power | Output | Power supply for mini-PCIe device,3.3V output MAX 3A in all pins |
| 3 | NC | float | NA | Not connected to this pin |
| 4 | GND | Power | NA | Power and signal reference ground |
| 5 | NC | float | NA | Not connected to this pin |
| 6 | NC | float | NA | Not connected to this pin |
| 7 | MINIPCIE20_CLKREQN_3V3_L | signal | Input | PCIe2.0 Channel Reference clock request |
| 8 | NC | float | NA | Not connected to this pin |
| 9 | GND | Power | NA | Power and signal reference ground |
| 10 | NC | float | NA | Not connected to this pin |
| 11 | PCIE20_2_REFCLKN | LVDS | Output | PCIe20 Port2 differential clock Negative |
| 12 | NC | float | NA | Not connected to this pin |
| 13 | PCIE20_2_REFCLKP | LVDS | Output | PCIe20 Port2 differential clock Positive |
| 14 | NC | float | NA | Not connected to this pin |
| 15 | GND | Power | NA | Power and signal reference ground |
| 16 | NC | float | NA | Not connected to this pin |
| 17 | NC | float | NA | Not connected to this pin |
| 18 | GND | Power | NA | Power and signal reference ground |
| 19 | NC | float | NA | Not connected to this pin |
| 20 | W_DISABLEN | signal | Output | PCIE device wireless disable |
| 21 | GND | Power | NA | Power and signal reference ground |
| 22 | MINIPCIE20_PERSTN | signal | Output | PCIE device reset |
| 23 | PCIE20_2_RXN | LVDS | Input | PCIe20 receive differential Negative |
| 24 | VCC3V3_MINIPCIE | Power | Output | Power supply for mini-PCIe device,3.3V output MAX 3A in all pins |
| 25 | PCIE20_2_RXP | LVDS | Input | PCIe20 receive differential Positive |
| 26 | GND | Power | NA | Power and signal reference ground |
| 27 | GND | Power | NA | Power and signal reference ground |
| 28 | NC | float | NA | Not connected to this pin |
| 29 | GND | Power | NA | Power and signal reference ground |
| 30 | NC | float | NA | Not connected to this pin |
| 31 | MINIPCIE20_TX_N | LVDS | Output | PCIe20 transmit differential Negative |
| 32 | NC | float | NA | Not connected to this pin |
| 33 | MINIPCIE20_TX_P | LVDS | Output | PCIe20 transmit differential Positive |
| 34 | GND | Power | NA | Power and signal reference ground |
| 35 | GND | Power | NA | Power and signal reference ground |
| 36 | MINIPCIE_USB_DM | LVDS | BI | USB20 HOST Port1 Data Minus |
| 37 | GND | Power | NA | Power and signal reference ground |
| 38 | MINIPCIE_USB_DP | LVDS | BI | USB20 HOST Port1 Data Plus |
| 39 | VCC3V3_MINIPCIE | Power | Output | Power supply for mini-PCIe device,3.3V output MAX 3A in all pins |
| 40 | GND | Power | NA | Power and signal reference ground |
| 41 | VCC3V3_MINIPCIE | Power | Output | Power supply for mini-PCIe device,3.3V output MAX 3A in all pins |
| 42 | NC | float | NA | Not connected to this pin |
| 43 | GND | Power | NA | Power and signal reference ground |
| 44 | NC | float | NA | Not connected to this pin |
| 45 | NC | float | NA | Not connected to this pin |
| 46 | NC | float | NA | Not connected to this pin |
| 47 | NC | float | NA | Not connected to this pin |
| 48 | NC | float | NA | Not connected to this pin |
| 49 | NC | float | NA | Not connected to this pin |
| 50 | GND | Power | NA | Power and signal reference ground |
| 51 | NC | float | NA | Not connected to this pin |
| 52 | VCC3V3_MINIPCIE | Power | Output | Power supply for mini-PCIe device,3.3V output MAX 3A in all pins |
MIPI-CSI
| Pin# | PinName | PinType | Input/Output | Signal Description |
| 1 | GND | Power | NA | Power and signal reference ground |
| 2 | MIPI_CSI0_RX_D0N | LVDS | Input | MIPI CSI0 receive differential data lane 0 Negative |
| 3 | MIPI_CSI0_RX_D0P | LVDS | Input | MIPI CSI0 receive differential data lane 0 Positive |
| 4 | GND | Power | NA | Power and signal reference ground |
| 5 | MIPI_CSI0_RX_D1N | LVDS | Input | MIPI CSI0 receive differential data lane 1 Negative |
| 6 | MIPI_CSI0_RX_D1P | LVDS | Input | MIPI CSI0 receive differential data lane 1 Positive |
| 7 | GND | Power | NA | Power and signal reference ground |
| 8 | MIPI_CSI0_RX_CLK0N | LVDS | Input | MIPI CSI0 receive differential Clock 0 Negative |
| 9 | MIPI_CSI0_RX_CLK0P | LVDS | Input | MIPI CSI0 receive differential Clock 0 Positive |
| 10 | GND | Power | NA | Power and signal reference ground |
| 11 | MIPI_CSI0_RX_D2N | LVDS | Input | MIPI CSI0 receive differential data lane 2 Negative |
| 12 | MIPI_CSI0_RX_D2P | LVDS | Input | MIPI CSI0 receive differential data lane 2 Positive |
| 13 | GND | Power | NA | Power and signal reference ground |
| 14 | MIPI_CSI0_RX_D3N | LVDS | Input | MIPI CSI0 receive differential data lane 3 Negative |
| 15 | MIPI_CSI0_RX_D3P | LVDS | Input | MIPI CSI0 receive differential data lane 3 Positive |
| 16 | GND | Power | NA | Power and signal reference ground |
| 17 | MIPI_CAM_PWM2 | signal | Output | PWM2 for LENS |
| 18 | NC | float | NA | Not connected to this pin |
| 19 | VCC_3V3_S0 | Power | Output | Power supply for sensor board,3.3V output |
| 20 | MIPI_CAM_RESETN | signal | Output | GPIO out for sensor reset |
| 21 | NC | float | NA | Not connected to this pin |
| 22 | MIPI_CAM_PDN | signal | Output | GPIO out for sensor power down |
| 23 | I2C3_SDA_M3_MIPI | signal | BI | I2C5 Bus data |
| 24 | I2C3_SCL_M3_MIPI | signal | Output | I2C5 Bus clock |
| 25 | GND | Power | NA | Power and signal reference ground |
| 26 | MIPI_CAM2_CLK_M1_3V3 | signal | Output | Camera Master clock output |
| 27 | GND | Power | NA | Power and signal reference ground. |
| 28 | VCC_5V0 | Power | Output | Power supply for sensor board, 5V output |
| 29 | VCC_5V0 | Power | Output | Power supply for sensor board, 5V output |
| 30 | VCC_5V0 | Power | Output | Power supply for sensor board, 5V output |
U.2
| Pin# | PinName | PinType | Input/Output | Signal Description |
| E1 | PCIE30_REFCLKP_SLOT | LVDS | Output | RC PCIe30 differential clock Positive |
| E2 | PCIE30_REFCLKN_SLOT | LVDS | Output | RC PCIe30 differential clock Negative |
| E3 | VCC_3V3_S0 | Power | Output | Power supply for IO |
| E4 | PCIE30X4_CLKREQN_M1_L | signal | Output | DM PCIe30 Channel Reference clock request |
| E5 | PCIE30X4_PERSTN_M1_L | signal | Input | DM PCIe30 Channel reset |
| E6 | PCIE30X4_CLKREQN_M3 | signal | Input | RC PCIe30 Channel Reference clock request |
| E7 | PCIE30_PORT1_REFCLKP | LVDS | Input | DM PCIe30 differential clock Positive |
| E8 | PCIE30_PORT1_REFCLKN | LVDS | Input | DM PCIe30 differential clock Negative |
| E9 | GND | Power | NA | Power and signal reference ground |
| E10 | PCIE30_PORT1_TX2P | LVDS | Output | DM PCIe30 transmit differential Positive |
| E11 | PCIE30_PORT1_TX2N | LVDS | Output | DM PCIe30 transmit differential Negative |
| E12 | GND | Power | NA | Power and signal reference ground |
| E13 | PCIE30_PORT1_RX2N | LVDS | Input | DM PCIe30 receive differential Negative |
| E14 | PCIE30_PORT1_RX2P | LVDS | Input | DM PCIe30 receive differential Positive |
| E15 | GND | Power | NA | Power and signal reference ground |
| E16 | NC | float | NA | Not connected to this pin |
| E17 | PCIE30_PORT0_RX1P | LVDS | Input | RC PCIe30 receive differential Negative |
| E18 | PCIE30_PORT0_RX1N | LVDS | Input | RC PCIe30 receive differential Positive |
| E19 | GND | Power | NA | Power and signal reference ground |
| E20 | PCIE30_PORT0_TX1N | LVDS | Output | RC PCIe30 transmit differential Positive |
| E21 | PCIE30_PORT0_TX1P | LVDS | Output | RC PCIe30 transmit differential Negative |
| E22 | GND | Power | NA | Power and signal reference ground |
| E23 | I2C4_SCL_M0 | signal | Output | I2C4 Bus clock |
| E24 | I2C4_SDA_M0 | signal | BI | I2C4 Bus data |
| E25 | DUALPORT_EN# | signal | Output | GPIO for Enable dual port, default low |
| P1 | PCIE30X4_WAKEN_M1_L | signal | Output | DM PCIE30 Wake up signal from RC |
| P2 | PCIE30X4_WAKEN_M3 | signal | Input | RC PCIE30 Wake up signal from DM |
| P3 | PWRDIS | signal | Output | GPIO for power disable to device |
| P4 | IFDET | signal | Input | GPIO for detect interface of device |
| P5 | GND | Power | NA | Power and signal reference ground |
| P6 | GND | Power | NA | Power and signal reference ground |
| P7 | NC | float | NA | Not connected to this pin |
| P8 | NC | float | NA | Not connected to this pin |
| P9 | NC | float | NA | Not connected to this pin |
| P10 | PRSNT# | signal | Input | GPIO for detect device if present |
| P11 | ACTIVITY# | signal | Input | GPIO for detect device if activity |
| P12 | GND | Power | NA | Power and signal reference ground |
| P13 | U2_12V | Power | Input | Power supply for blade3, input 12V |
| P14 | U2_12V | Power | Input | Power supply for blade3, input 12V |
| P15 | U2_12V | Power | Input | Power supply for blade3, input 12V |
| S1 | GND | Power | NA | Power and signal reference ground |
| S2 | SATA0_TXP | LVDS | Output | SATA30 Port0 transmit differential Positive |
| S3 | SATA0_TXN | LVDS | Output | SATA30 Port0 transmit differential Negative |
| S4 | GND | Power | NA | Power and signal reference ground |
| S5 | SATA0_RXN | LVDS | Input | SATA30 Port0 receive differential Positive |
| S6 | SATA0_RXP | LVDS | Input | SATA30 Port0 receive differential Negative |
| S7 | GND | Power | NA | Power and signal reference ground |
| S8 | GND | Power | NA | Power and signal reference ground |
| S9 | NC | float | NA | Not connected to this pin |
| S10 | NC | float | NA | Not connected to this pin |
| S11 | GND | Power | NA | Power and signal reference ground |
| S12 | NC | float | NA | Not connected to this pin |
| S13 | NC | float | NA | Not connected to this pin |
| S14 | GND | Power | NA | Power and signal reference ground |
| S15 | PCIE30X4_PERSTN_M3 | signal | Output | RC PCIe30 Channel reset |
| S16 | GND | Power | NA | Power and signal reference ground |
| S17 | PCIE30_PORT1_TX3P | LVDS | Output | DM PCIe30 transmit differential Negative |
| S18 | PCIE30_PORT1_TX3N | LVDS | Output | DM PCIe30 transmit differential Positive |
| S19 | GND | Power | NA | Power and signal reference ground |
| S20 | PCIE30_PORT1_RX3N | LVDS | Input | DM PCIe30 receive differential Negative |
| S21 | PCIE30_PORT1_RX3P | LVDS | Input | DM PCIe30 receive differential Positive |
| S22 | GND | Power | NA | Power and signal reference ground |
| S23 | PCIE30_PORT0_RX0P | LVDS | Input | RC PCIe30 receive differential Negative |
| S24 | PCIE30_PORT0_RX0N | LVDS | Input | RC PCIe30 receive differential Positive |
| S25 | GND | Power | NA | Power and signal reference ground |
| S26 | PCIE30_PORT0_TX0N | LVDS | Output | RC PCIe30 transmit differential Negative |
| S27 | PCIE30_PORT0_TX0P | LVDS | Output | RC PCIe30 transmit differential Positive |
| S28 | GND | Power | NA | Power and signal reference ground |
Debug
| Pin# | PinName | PinType | Input/Output | Signal Description |
| 1 | UART2_RX_M0_DEBUG | signal | Input | UART2 Receive Data for debug |
| 2 | UART2_TX_M0_DEBUG | signal | Output | UART2 Transmit Data for debug |
| 3 | GND | signal | NA | Power and signal reference ground |
Technical Support
MIXTILE technical support team assists you with the questions you may have. Contact us with the following methods below.
- Email: support@mixtile.com
- Website: https://www.mixtile.com
- Community: https://community.mixtile.com/